• DOI:10.1109/ICM.2013.6734995
Corpus ID: 17564442

Efficient hardware architecture for direct 2D DCT computation and its FPGA implementation

@article{Hatim2013EfficientHA,
  title={Efficient hardware architecture for direct 2D DCT computation and its FPGA implementation},
  author={A. Hatim and S. Belkouch and T. Sadiki and M. Hassani},
  journal={2013 25th International Conference on Microelectronics (ICM)},
  year={2013},
  pages={1-4}
}

• A. Hatim, S. Belkouch, +1 author M. Hassani
• Published 2013
• Computer Science
• 2013 25th International Conference on Microelectronics (ICM)

In this paper, we propose a low complexity architecture for direct 2D-DCT computation. The architecture will transform the pixels from spatial to spectral domain with the required quality constraints of the compression standards. In our previous works we introduced a new fast 2D_DCT with low computations: only 40 additions are used and no multiplications are needed. Based on that algorithm we developed in this work a new architecture to achieve the computations of the 2D DCT directly without… Expand

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