Efficient datapath merging for partially reconfigurable architectures

@article{Moreano2005EfficientDM,
  title={Efficient datapath merging for partially reconfigurable architectures},
  author={Nahri Moreano and Edson Borin and Cid C. de Souza and Guido Araujo},
  journal={IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
  year={2005},
  volume={24},
  pages={969-980}
}
Reconfigurable systems have been shown to achieve significant performance speedup through architectures that map the most time-consuming application kernel modules or inner loops to a reconfigurable datapath. As each portion of the application starts to execute, the system partially reconfigures the datapath so as to perform the corresponding computation. The reconfigurable datapath should have as few and simple hardware blocks and interconnections as possible, in order to reduce its cost, area… CONTINUE READING
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