Efficient advance encryption standard (AES) implementation on FPGA using Xilinx system generator

@article{Talha2016EfficientAE,
  title={Efficient advance encryption standard (AES) implementation on FPGA using Xilinx system generator},
  author={S. M. Umar Talha and Mir Asif and Hammad Akhtar Hussain and Ali Asghar and Hadi Ameen},
  journal={2016 6th International Conference on Intelligent and Advanced Systems (ICIAS)},
  year={2016},
  pages={1-6}
}
The paper presents an efficient reconfigurable hardware implementation of Advance Encryption Standard (AES) algorithm on Field Programmable Gate Array (FPGA); using High Level Language (HLL) approach with less hardware resources. The FPGA platform used for AES implementation is Xilinx Atlys Virtex-6. Time-to-market is one of the key factors for any design in FPGA and digital system designing industry. This time can be reduced considerably with HLL approach. The presented algorithm is designed… CONTINUE READING