Efficient Timing Channel Protection for On-Chip Networks

  title={Efficient Timing Channel Protection for On-Chip Networks},
  author={Yao Wang and G. Edward Suh},
  journal={2012 IEEE/ACM Sixth International Symposium on Networks-on-Chip},
On-chip network is often dynamically shared among applications that are concurrently running on a chip-multiprocessor (CMP). In general, such shared resources imply that applications can affect each other's timing characteristics through interference in shared resources. For example, in on-chip networks, multiple flows can compete for links and buffers. We show that this interference is an attack vector through which a malicious application may be able to infer data-dependent information about… CONTINUE READING
Highly Influential
This paper has highly influenced 13 other papers. REVIEW HIGHLY INFLUENTIAL CITATIONS
Highly Cited
This paper has 66 citations. REVIEW CITATIONS


Publications citing this paper.
Showing 1-10 of 48 extracted citations

Efficient Timing Channel Protection for Hybrid (Packet/Circuit-Switched) Network-on-Chip

IEEE Transactions on Parallel and Distributed Systems • 2018
View 10 Excerpts
Highly Influenced

Securing NoCs Against Timing Attacks with Non-Interference Based Adaptive Routing

2018 Twelfth IEEE/ACM International Symposium on Networks-on-Chip (NOCS) • 2018
View 5 Excerpts
Highly Influenced

Gossip NoC -- Avoiding Timing Side-Channel Attacks through Traffic Management

2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) • 2016
View 7 Excerpts
Highly Influenced

Dynamic NoC buffer allocation for MPSoC timing side channel attack protection

2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS) • 2016
View 4 Excerpts
Highly Influenced

PhaseNoC: Versatile Network Traffic Isolation Through TDM-Scheduled Virtual Channels

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems • 2016
View 3 Excerpts
Highly Influenced

67 Citations

Citations per Year
Semantic Scholar estimates that this publication has 67 citations based on the available data.

See our FAQ for additional information.


Publications referenced by this paper.
Showing 1-10 of 14 references

Composable Resource Sharing Based on Latency-Rate Servers

2009 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools • 2009
View 1 Excerpt

Preemptive Virtual Clock: A flexible, efficient, and cost-effective QOS scheme for networks-on-chip

2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO) • 2009
View 2 Excerpts

Covert and Side Channels Due to Processor Architecture

2006 22nd Annual Computer Security Applications Conference (ACSAC'06) • 2006

Similar Papers

Loading similar papers…