Efficient FPGA Implementation of Equalizer for Finite Interval Constant Modulus Algorithm

@article{Sucha2006EfficientFI,
title={Efficient FPGA Implementation of Equalizer for Finite Interval Constant Modulus Algorithm},
author={Premysl Sucha and Zdenek Hanz{\'a}lek and Antonin Hermanek and Jan Schier},
journal={2006 International Symposium on Industrial Embedded Systems},
year={2006},
pages={1-10}
}

This paper deals with the optimization of iterative algorithms with matrix operations or nested loops for hardware implementation in Field Programmable Gate Arrays (FPGA), using Integer Linear Programming (ILP). The method is demonstrated on an implementation of the Finite Interval Constant Modulus Algorithm, proposed for 4G communication systems. We used two pipelined arithmetic ibraries based on the logarithmic number system or the floating-point number system, using the widely known IEEE… CONTINUE READING