Efficient Design and Implementation of DFA Based Pattern Matching on Hardware

@inproceedings{Pandey2012EfficientDA,
  title={Efficient Design and Implementation of DFA Based Pattern Matching on Hardware},
  author={Aakanksha Pandey and Dr. Nilay Khare and Akhtar Rasool},
  year={2012}
}
Pattern matching is a crucial task in several critical network services such as intrusion detection. In this paper we present an efficient implementation of the DFA with optimized area and optimized memory by the introduction of state minimization algorithm. By using minimized DFA the clock frequency reduces to 40% of the original and the area also reduces to 30%. This optimized architecture of DFA is simulated and synthesized using VHDL on the Xilinx ISE 12.4.. 

Citations

Publications citing this paper.

References

Publications referenced by this paper.
Showing 1-10 of 12 references

Department of Electrical Engineering University of Southern California Los Angeles, CA 90089, USA A Memory-Efficient and Modular Approach for String Matching on FPGAs

  • Hoang Le, Viktor K. Prasanna Ming Hsieh
  • 2010

and Munehiro matsuura “ A Regular Expression Matching Using Non - Deterministic Finite Automata ”

  • Jan Kastil, Kai Wang, +4 authors Tsutomu Sasao
  • IEEE
  • 2010

matsuura “A Regular Expression Matching Using Non-Deterministic Finite Automata

  • Hiroki Nakahara, Tsutomu Sasao, Munehiro
  • 2010
1 Excerpt

Vasanthanayaki “Hardware Based Pattern Matching Technique for Packet Inspection of High Speed Network

  • C. M. Dhanapriya
  • International Conference on “Control,Automation…
  • 2009
1 Excerpt

Santambrogio “ An adaptable FPGA based system for regular expression Matching ”

  • Ivano Bonesana, Marco Paolieri, D. Marco
  • IEEE
  • 2008

Patel”Distributed IDS using Reconfigurable Hardware

  • Ashok kumar Tummala, Parimal
  • 2007

Similar Papers

Loading similar papers…