Efficient Architecture for Variable Block Size Motion Estimation in H . 264 / AVC

@inproceedings{Muralidhar2014EfficientAF,
  title={Efficient Architecture for Variable Block Size Motion Estimation in H . 264 / AVC},
  author={P. Muralidhar and C. B. Rama Rao and C. Y. N. Dwith},
  year={2014}
}
This paper proposes an efficient VLSI architecture for the implementation of variable block size motion estimation (VBSME). To improve the performance video compression the Variable Block Size Motion Estimation (VBSME) is the critical path. Variable Block Size Motion Estimation feature has been introduced in to the H.264/AVC. This feature induces significant complexities into the design of the H.264/AVC video codec. This paper we compare the existing architectures for VBSME. An efficient… CONTINUE READING

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