Effective compiler generation by architecture description

@inproceedings{Farfeleder2006EffectiveCG,
  title={Effective compiler generation by architecture description},
  author={Stefan Farfeleder and Andreas Krall and Edwin Steiner and Florian Brandner},
  booktitle={LCTES},
  year={2006}
}
Embedded systems have an extremely short time to market and therefore require easily retargetable compilers. Architecture description languages (ADLs) provide a single concise architecture specification for the generation of hardware, instruction set simulators and compilers. In this article, we present an ADL for compiler generation. From a specification, we can derive an optimized tree pattern matching instruction selector, a register allocator and an instruction scheduler. Compared to a hand… CONTINUE READING

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Pydgin: generating fast instruction set simulators from simple architecture descriptions with meta-tracing JIT compilers

2015 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS) • 2015
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ASAP 2010 - 21st IEEE International Conference on Application-specific Systems, Architectures and Processors • 2010
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