Effect of N-type CNTFET on Double edge triggered D flip-flop based PISO shift register

Abstract

This paper enumerates the efficient design and analysis of Parallel in serial out (PISO) shift register using N-type CNTFET Double Edge Triggered D Flip-flop. The Flip flop is designed using Ballistic CNTFET (VHDL-AMS model) with the dcnt of Inm in resistive load inverter logic. The transient and power analysis are obtained with operating voltage at 0.6V… (More)

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Cite this paper

@article{Ravi2012EffectON, title={Effect of N-type CNTFET on Double edge triggered D flip-flop based PISO shift register}, author={T. Ravi and Vinoth Kannan}, journal={2012 International Conference on Emerging Trends in Science, Engineering and Technology (INCOSET)}, year={2012}, pages={344-349} }