Edge effect aware crosstalk avoidance technique for 3D integration

@article{Bamberg2017EdgeEA,
  title={Edge effect aware crosstalk avoidance technique for 3D integration},
  author={Lennart Bamberg and Amir Najafi and Alberto Garc{\'i}a Ortiz},
  journal={2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)},
  year={2017},
  pages={1-8}
}
3D integration is one of the most promising solutions for the scaling of future integrated circuits (ICs). Nevertheless, the 2D metal wires and 3D through silicon vias (TSVs) are frequently performance bottlenecks of 3D ICs, due to their high capacitive crosstalk, which can be reduced by a coding approach. In this work we show that existing TSV crosstalk avoidance codes (CACs) are impractical for real applications due to the edge effects in TSV arrays. Additionally, these 3D CACs do not reduce… CONTINUE READING

Citations

Publications citing this paper.
Showing 1-2 of 2 extracted citations

An Exhaustive Search of the Optimal 6C Level Static Shielding Scheme for Rectangle TSV Arrays

2018 19th International Conference on Electronic Packaging Technology (ICEPT) • 2018
View 7 Excerpts
Highly Influenced

Exploiting Temporal Misalignment to Optimize the Interconnect Performance for 3D Integration

2018 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) • 2018
View 3 Excerpts

References

Publications referenced by this paper.
Showing 1-10 of 25 references

Analysis and avoidance of cross-talk in on-chip buses

Hot Interconnects • 2001
View 13 Excerpts
Highly Influenced

An Enhancement of Crosstalk Avoidance Code Based on Fibonacci Numeral System for Through Silicon Vias

IEEE Transactions on Very Large Scale Integration (VLSI) Systems • 2017
View 10 Excerpts
Highly Influenced

3DLAT: TSV-based 3D ICs crosstalk minimization utilizing Less Adjacent Transition code

2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC) • 2014
View 10 Excerpts
Highly Influenced

On and Off-Chip Crosstalk Avoidance in VLSI Design, 2010th ed

B.J.L.C. Duan, S. P. Khatri
2014
View 10 Excerpts
Highly Influenced

Crosstalk avoidance codes for 3D VLSI

2013 Design, Automation & Test in Europe Conference & Exhibition (DATE) • 2013
View 10 Excerpts
Highly Influenced

Optimization of interconnect architectures through coding: A review

2011 Saudi International Electronics, Communications and Photonics Conference (SIECPC) • 2011
View 3 Excerpts
Highly Influenced

Simulated Annealing: A Proof of Convergence

IEEE Trans. Pattern Anal. Mach. Intell. • 1994
View 3 Excerpts
Highly Influenced

Coupling capacitance in through-silicon vias: non-homogeneous medium effect

T. Ramadan, E. Yahya, Y. Ismail, M. Dessouky
Electronics Letters, vol. 52, no. 2, pp. 152–154, 2016. • 2016
View 1 Excerpt

Different scenarios for estimating coupling capacitances of through silicon via (TSV) arrays

5th International Conference on Energy Aware Computing Systems & Applications • 2015
View 2 Excerpts

Similar Papers

Loading similar papers…