• Corpus ID: 17831008

Ece 734 Final Project Report Methods of Modulation and Demodulation in Ofdm System: Implement and Analysis for Ber Performance, Hardware Performance, and Hardware Complexity

  title={Ece 734 Final Project Report Methods of Modulation and Demodulation in Ofdm System: Implement and Analysis for Ber Performance, Hardware Performance, and Hardware Complexity},
  author={Yu-Hen Hu and Hsin-Yu Chen},
The structure and algorithm of IDFT DFT, the conventional method used in modulation/demodulation process in OFDM system, has matured today. Researchers have developed new transforms in an effort to replace this traditional structure, such as DHT-based structure (Discrete Hartley Transform) and DWT-based (Discrete Wavelet Transform) structure. In this project, all three structures will be implemented in MATLAB to acquire their BER (Bit Error Rate) performances, and the results will be compared… 

Tables from this paper


Studies on DWT-OFDM and FFT-OFDM systems
Comparative studies on DWT-OFDM and FFTOFDM systems are presented. The model for DWT-OFDM includes zero-padding and vector transpose for transmitting the OFDM signal. MATLAB simulation commands are
New efficient FFT algorithm and pipeline implementation results for OFDM/DMT applications
Since the proposed algorithm can achieve higher processing rate and better efficiency than the conventional algorithm, it is very suitable for the OFDM/DMT applications such as the WLAN, DAB/DVB, and ADSL/VDSL systems.
A 8192 complex point FFT/IFFT for COFDM modulation scheme in DVB-T system
In order to reduce the required chip area for the sequential processing of 8 K complex data, a DRAM-based pipelined commutator architecture is used, and this brings 60% chip size reduction over the flip-flop approach.
A novel DHT-based FFT/IFFT processor for ADSL transceivers
  • Chin-Liang WangChing-Hsien Chang
  • Computer Science
    ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349)
  • 1999
A novel discrete Hartley transform based VLSI architecture for quickly computing the N-point discrete Fourier transform and its inverse (IDFT), where N is a power of two, shows that it is rather attractive for use in discrete multitone based ADSL transceivers.
A new design approach to VLSI parallel implementation of discrete Hartley transform
  • D. ChiperV. Munteanu
  • Computer Science
    Proceedings of IEEE International Symposium on Industrial Electronics
  • 1996
The presented approach is based on an adequate decomposition of the DHT transform in two related subproblems which are efficiently converted into similar cyclic convolution forms and mapped into a single linear systolic array, which has outstanding performance in hardware cost of the processing elements, average computation time, and I/O cost.
A novel systolic design for fast computation of the discrete Hartley transform
A novel systolic array with log/sub 2/N multipliers and 3log/sub2/N adders for computing the N-point DHT, where N is a power of two, and gains improvements in area-time complexity.
The Fast Hartley Transform Algorithm
  • H. Hou
  • Computer Science
    IEEE Transactions on Computers
  • 1987
Through use of the fast Hartley transform, discrete cosine transforms (DCT) and discrete Fourier transforms (DFT) can be obtained and the recursive nature of the FHT algorithm derived in this paper enables us to generate the next higher order FHT from two identical lower order F HT's.
A new VLSI-oriented FFT algorithm and implementation
A new VLSI-oriented fast Fourier transform (FFT) algorithm-radix-2/4/8, which can effectively minimize the number of complex multiplications and is designed for use in the DVB application in 0.3 V triple-metal CMOS process.
The fast Hartley transform
The Fast Hartley Transform (FHT) is as fast as or faster than the Fast Fourier Transform (FFT) and serves for all the uses such as spectral analysis, digital processing, and convolution to which the FFT is at present applied.