ETA: experience with an Intel Xeon processor as a packet processing engine

@article{Regnier2004ETAEW,
  title={ETA: experience with an Intel Xeon processor as a packet processing engine},
  author={Greg J. Regnier and Dave B. Minturn and Gary L. McAlpine and Vikram A. Saletore and Annie P. Foong},
  journal={IEEE Micro},
  year={2004},
  volume={24},
  pages={24-31}
}
Server-based networks have well-documented performance limitations. These limitations outline a major goal of Intel's embedded transport acceleration (ETA) project, the ability to deliver high-performance server communication and I/O over standard Ethernet and transmission control protocol/Internet protocol (TCP/IP) networks. By developing this capability, Intel hopes to take advantage of the large knowledge base and ubiquity of these standard technologies. With the advent of 10 gigabit… CONTINUE READING
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