EGRA: A Coarse Grained Reconfigurable Architectural Template

@article{Ansaloni2011EGRAAC,
  title={EGRA: A Coarse Grained Reconfigurable Architectural Template},
  author={Giovanni Ansaloni and Paolo Bonzini and Laura Pozzi},
  journal={IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
  year={2011},
  volume={19},
  pages={1062-1074}
}
  • Giovanni Ansaloni, Paolo Bonzini, Laura Pozzi
  • Published 2011
  • Computer Science
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • Reconfigurable arrays combine the benefit of spatial execution, typical of hardware solutions, with that of programmability, present in microprocessors. When mapping software applications (or parts of them) onto hardware, however, fine-grain arrays, such as field-programmable gate arrays (FPGAs), often provide more flexibility than is needed, and do not implement coarser-level operations efficiently. Therefore, coarse grained reconfigurable arrays (CGRAs) have been proposed to this aim. Most… CONTINUE READING
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