Dynamically Configurable Bus Topologies for High-Performance On-Chip Communication

  title={Dynamically Configurable Bus Topologies for High-Performance On-Chip Communication},
  author={Krishna Sekar and Kanishka Lahiri and Anand Raghunathan and Sujit Dey},
  journal={IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
The on-chip communication architecture is a primary determinant of overall performance in complex system-on-chip (SoC) designs. Since the communication requirements of SoC components can vary significantly over time, communication architectures that dynamically detect and adapt to such variations can substantially improve system performance. In this paper, we propose Flexbus, a new architecture that can efficiently adapt the logical connectivity of the communication architecture and the… CONTINUE READING