Dynamic zero compression for cache energy reduction

  title={Dynamic zero compression for cache energy reduction},
  author={Luis Villa and Michael Zhang and Krste Asanovic},
Dynamic Zero Compression reduces the energy required for cache accesses by only writing and reading a single bit for every zero-valued byte. This energy-conscious compression is invisible to software and is handled with additional circuitry embedded inside the cache RAM arrays and the CPU. The additional circuitry imposes a cache area overhead of 9% and a read latency overhead of around two FO4 gate delays. Simulation results show that we can reduce total data cache energy by around 26% and… CONTINUE READING
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