Dynamic voltage and frequency management for a low-power embedded microprocessor

@article{Seki2004DynamicVA,
  title={Dynamic voltage and frequency management for a low-power embedded microprocessor},
  author={Takahiro Seki and Satoshi Akui and Katsunori Seno and Masakatsu Nakai and Tetsumasa Meguro and Tetsuo Kondo and Akihiko Hashiguchi and Hirokazu Kawahara and Kazuo Kumano and Masayuki Shimura},
  journal={IEEE Journal of Solid-State Circuits},
  year={2004},
  volume={40},
  pages={28-35}
}
High-performance and low-power microprocessors are key to PDA applications. A dynamic voltage and frequency management (DVFM) scheme with leakage power compensation effect is introduced in a microprocessor with 128-bit wideband 64-Mb embedded DRAM. The DVFM scheme autonomously controls clock frequency from 8 to 123 MHz in steps of 0.5 MHz and also adaptively controls supply voltage from 0.9 to 1.6 V in steps of 5 mV, achieving 82% power reduction in personal information management scheduler… CONTINUE READING
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