Dynamic reconfiguration with hardwired networks-on-chip on future FPGAs


Due to their layered approach, networks-on-chip (NoC) are a promising communication backbone in the field of heterogeneous dynamically reconfigurable systems. In this paper a future FPGA architecture is discussed having a hardwired NoC as an additional high-level routing resource. Instead of implementing on-chip interconnection with valuable reconfigurable… (More)
DOI: 10.1109/FPL.2005.1515777


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