Dynamic-range estimation

@article{Wu2006DynamicrangeE,
  title={Dynamic-range estimation},
  author={Bin Wu and Jianwen Zhu and Farid N. Najm},
  journal={IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
  year={2006},
  volume={25},
  pages={1618-1636}
}
  • Bin Wu, J. Zhu, F. Najm
  • Published 2006
  • Mathematics, Computer Science
  • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
It has been widely recognized that the dynamic-range information of an application can be exploited to reduce the datapath bitwidth of either processors or application-specific integrated circuits and, therefore, the overall circuit area, delay, and power consumption. While recent proposals of analytical dynamic-range-estimation methods have shown significant advantages over the traditional profiling-based method in terms of runtime, it is argued here that the rather simplistic treatment of… Expand
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References

SHOWING 1-10 OF 26 REFERENCES
Determining appropriate precisions for signals in fixed-point IIR filters
TLDR
An analytical framework for the implementation of digital infinite impulse response filters in fixed-point hardware on field programmable gate arrays is presented and a second-order filter used as a compensator in a magnetic bearing control system is applied. Expand
Combined word-length optimization and high-level synthesis ofdigital signal processing systems
TLDR
A combined WL optimization and high-level synthesis algorithm not only to minimize the hardware implementation cost, but also to reduce the optimization time significantly is developed. Expand
Embedded ISA support for enhanced floating-point to fixed-point ANSI-C compilation
TLDR
A novel xed-p oint instruction-set operation, Fractional Multiplication with internal Left Shift (FMLS), and an associated translation algorithm|Intermediate-ResultProling based Shift Absorption (IRP-SA), that enhance xedpoint rounding-noise and runtime performance are introduced. Expand
On the interaction of roundoff noise and dynamic range in digital filters
  • L. Jackson
  • Mathematics, Computer Science
  • Bell Syst. Tech. J.
  • 1970
TLDR
The concept of “transpose configurations” is introduced and is found to be quite useful in digital-filter synthesis; for although such configurations have identical transfer functions, their roundoff-noise outputs and dynamic-range limitations can be quite different, in general. Expand
Moment-Based Power Estimation in Very Deep Submicron Technologies
The significant power optimization possibilities in the early stagesof the design flow advice the use of energy evaluation techniquesat high levels of abstraction. With this aim, the present workExpand
Fast, Accurate Static Analysis for Fixed-Point Finite-Precision Effects in DSP Designs
TLDR
A new static analysis technique that can accurately analyze finite-precision effects arising from fixed-point implementations of DSP algorithms is described, based on recent interval representation methods from affine arithmetic, and the use of new probabilistic bounds. Expand
Bitwidth cognizant architecture synthesis of custom hardwareaccelerators
TLDR
Experimental results show that exploiting integer bitwidth substantially reduces the gate count of PICO-synthesized hardware accelerators across a range of applications. Expand
A floating-point to integer C converter with shift reduction for fixed-point digital signal processors
  • Ki-Il Kum, Jiyang Kang, Wonyong Sung
  • Computer Science
  • 1999 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings. ICASSP99 (Cat. No.99CH36258)
  • 1999
TLDR
A floating-point to integer C program translator is developed for convenient programming and efficient use of fixed-point programmable digital signal processors (DSPs) and conducts shift optimization to enhance execution speed. Expand
A system-level energy minimization approach using datapath width optimization
This paper presents a novel system-level approach that minimizes the energy consumption of embedded core-based systems through datapath width optimization. It is based on the idea of minimizingExpand
...
1
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3
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