Dynamic power management of off-chip links for Hybrid Memory Cubes

@article{Ahn2014DynamicPM,
  title={Dynamic power management of off-chip links for Hybrid Memory Cubes},
  author={Junwhan Ahn and Sungjoo Yoo and Kiyoung Choi},
  journal={2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)},
  year={2014},
  pages={1-6}
}
The Hybrid Memory Cube (HMC) is a 3D-stacked DRAM architecture designed for substantially improved memory bandwidth. In particular, its I/O interface achieves up to 320 GB/s of external bandwidth through high-speed serial links. However, it comes at a cost of large static power of off-chip links, which dominates total power consumption of HMCs. Therefore, we propose an adaptive mechanism to partially disable off-chip links of HMCs with a minimal performance impact. We also present two-level… CONTINUE READING
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