Dynamic power consumption in Virtex[tm]-II FPGA family

@inproceedings{Shang2002DynamicPC,
  title={Dynamic power consumption in Virtex[tm]-II FPGA family},
  author={Li Shang and Alireza Kaviani and Kusuma Bathala},
  booktitle={FPGA},
  year={2002}
}
This paper analyzes the dynamic power consumption in the fabric of Field Programmable Gate Arrays (FPGAs) by taking advantage of both simulation and measurement. Our target device is Xilinx Virtex™-II family, which contains the most recent and largest programmable fabric. We identify important resources in the FPGA architecture and obtain their utilization, using a large set of real designs. Then, using a number of representative case studies we calculate the switching activity corresponding to… CONTINUE READING

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Results and Topics from this paper.

Key Quantitative Results

  • According to our results, the power dissipation share of routing, logic and clocking resources are 60%, 16%, and 14%, respectively.
  • According to our results, the power dissipation share of routing, logic and clocking resources are 60%, 16%, and 14%, respectively.

Citations

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