Dynamic Verification of Cache Coherence Protocols

@inproceedings{Cantin2001DynamicVO,
  title={Dynamic Verification of Cache Coherence Protocols},
  author={Jason F. Cantin and Mikko H. Lipasti and James E. Smith},
  year={2001}
}
A method for improving the fault-tolerance of cache coherent multiprocessors is proposed. By dynamically verifying coherence operations in hardware, errors caused by manufacturing faults, soft errors, and design mistakes can be detected. Analogous to the DIVA concept for singleprocessor systems, a simple version of the protocol functions as a checker for the aggressive implementation. An example implementation is shown, and the overhead is estimated for a small SMP system. 
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