Dynamic Context Compression for Low-Power Coarse-Grained Reconfigurable Architecture

@article{Kim2010DynamicCC,
  title={Dynamic Context Compression for Low-Power Coarse-Grained Reconfigurable Architecture},
  author={Yoonjin Kim and Rabi N. Mahapatra},
  journal={IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
  year={2010},
  volume={18},
  pages={15-28}
}
Most of the coarse-grained reconfigurable architectures (CGRAs) are composed of reconfigurable ALU arrays and configuration cache (or context memory) to achieve high performance and flexibility. Specially, configuration cache is the main component in CGRA that provides distinct feature for dynamic reconfiguration in every cycle. However, frequent memory-read operations for dynamic reconfiguration cause much power consumption. Thus, reducing power in configuration cache has become critical for… CONTINUE READING
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