Dual-<formula formulatype="inline"><tex>$V_{dd}$</tex></formula> Buffer Insertion for Power Reduction

Abstract

This paper presents the first in-depth study on dual-<i>Vdd</i> buffer insertion for power minimization under delay constraint. Compared with delay-optimal single <i>Vdd</i> buffer insertion, the dual- <i>Vdd</i> buffer insertion reduces power by 16%. Such power reduction increases when the delay specification is relaxed. Whereas the van Ginneken algorithm… (More)

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Cite this paper

@article{Tam2008DualformulaFB, title={Dual-\$V_\{dd\}\$ Buffer Insertion for Power Reduction}, author={King Ho Tam and Yu Hu and Lei He and Tom Tong Jing and Xinyi Zhang}, journal={IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems}, year={2008}, volume={27}, pages={1498-1502} }