Corpus ID: 17762647

Dual Edge Triggered Phase Detector for DLL and PLL Applications

  title={Dual Edge Triggered Phase Detector for DLL and PLL Applications},
  author={Prasanna Kumar and S. Ashok and Arun Kumar},
An ASIC design of Dual Edge Triggered Phase Detector(DET PD) for Delay locked loop(DLL) and Phase locked loop(PLL) applications is proposed in this paper.The proposed DET PD has high locking speed and less jitter. The designs are based on TSPC flip flop logic, which overcomes the issue of narrow capture range. The Double edge triggered phase detector dissipates less power than conventional designs and can be operated at a frequency range of 250MHz to 1GHz.The proposed DET-PD is designed using… Expand

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