Driver pre-emphasis techniques for on-chip global buses

@article{Zhang2005DriverPT,
  title={Driver pre-emphasis techniques for on-chip global buses},
  author={Liang Zhang and John M. Wilson and Rizwan Bashirullah and Lei Luo and Jian Xu and Paul D. Franzon},
  journal={ISLPED '05. Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005.},
  year={2005},
  pages={186-191}
}
By using current-sensing differential buses with driver pre-emphasis techniques, power dissipation is reduced by 26.0% - 51.2% and peak current is reduced by 63.8%, compared to conventional repeater insertion techniques, for 10mm long buses in TSMC 0.25μm technology. This proposed architecture lowers the worst coupling capacitance to total capacitance ratio to 14.4%. It only requires 7.9% more bus routing area than single-ended designs for a 16-bit bus, and saves all of the repeater placement… CONTINUE READING
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