Double Throughput Multiply-Accumulate unit for FlexCore processor enhancements

@article{Hoang2009DoubleTM,
  title={Double Throughput Multiply-Accumulate unit for FlexCore processor enhancements},
  author={Tung Thanh Hoang and Magnus Sj{\"a}lander and Per Larsson-Edefors},
  journal={2009 IEEE International Symposium on Parallel \& Distributed Processing},
  year={2009},
  pages={1-7}
}
As a simple five-stage General-Purpose Processor (GPP), the baseline FlexCore processor has a limited set of datapath units. By utilizing a flexible datapath interconnect and a wide control word, a FlexCore processor is explicitly designed to support integration of special units that, on demand, can accelerate certain data-intensive applications. In this paper, we propose the integration of a novel Double Throughput Multiply-Accumulate (DTMAC) unit, whose different operating modes allow for on… 

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