Don't Use the Page Number, but a Pointer to It

  title={Don't Use the Page Number, but a Pointer to It},
  author={S. Seznec},
  journal={23rd Annual International Symposium on Computer Architecture (ISCA'96)},
Most newly announced high performance microprocessors support 64-bit virtual addresses and the width of physical addresses is also growing. As a result, the size of the address tags in the L1 cache is increasing. The impact of on chip area is particularly dramatic when small block sizes are used. At the same time, the performance of high performance microprocessors depends more and more on the accuracy of branch prediction and for reasons similar to those in the case of caches the size of the… CONTINUE READING
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