Distributed and dynamic shared-buffer router for high-performance interconnect


Most Network-on-Chip routers dedicate a set of buffers to the input and/or output ports. This design decision leads to buffer underutilization especially when running applications with non-uniform traffic patterns. In order to maximize resource usage for performance and energy gains, we present a synchronous and elastic buffer implementation of a router… (More)
DOI: 10.1145/3130218.3130223

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