Disassembler Using High Level Processor Models


The design of a high performance system requires an integrated environment to simulate and analyze the performance of various design alternatives. In this thesis, we have developed a generic disassembler for an integrated environment where Sim-nML acts as the speci cation language for processor performance model. The Sim-nML, an extension of nML machine… (More)


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@inproceedings{Jain1999DisassemblerUH, title={Disassembler Using High Level Processor Models}, author={Nihal Chand Jain}, year={1999} }