A novel power gating technique for 3-bit flash analog to digital converter
Flash ADC is an important component for realization of high speed and low power devices in signal processing system .As technology scale down, leakage current becomes the most concerned factor. This paper reports the power gating technique to provide the reduction mechanism for suppressing the leakage current effectively during standby mode but it introduces ground bounce noise. We designed a “3” bit flash ADC with power gating technique to reduce leakage current and ground bounce noise in different mode of operation. This diode based power gating technique provides the reduction of leakage current in standby mode, and reduction of ground bounce noise in sleep-to-active mode. The improved power gating technique provides 82% reduction in leakage current, and 73% reduction in ground bounce noise as compared with conventional flash ADC. Flash ADC with diode based stacking power gating technique has been designed with the help of cadence tool at various supply voltages with 45 nm technology.