Digital Calibration Incorporating Redundancy of Flash ADCs

@inproceedings{Flynn2001DigitalCI,
  title={Digital Calibration Incorporating Redundancy of Flash ADCs},
  author={Michael P. Flynn and C. Donovan and Linda Sattler},
  year={2001}
}
As feature size and supply voltage shrink, digital calibration incorporating redundancy of flash analog-to-digital converters is becoming attractive. This new scheme allows accuracy to be achieved through the use of redundancy and reassignment, effectively decoupling analog performance from component matching. Very large comparator offsets (several LSBs) are tolerated, allowing the comparators to be small, fast and power efficient. In this paper, we analyze this scheme and compare with it with… CONTINUE READING
Highly Cited
This paper has 65 citations. REVIEW CITATIONS

Citations

Publications citing this paper.
Showing 1-10 of 47 extracted citations

An Oversampling Stochastic ADC Using VCO-Based Quantizers

IEEE Transactions on Circuits and Systems I: Regular Papers • 2018
View 1 Excerpt

Bandwidth Enhancement to Continuous-Time Input Pipeline ADCs

IEEE Transactions on Very Large Scale Integration (VLSI) Systems • 2018
View 1 Excerpt

Power Optimized Comparator Selecting Method For Stochastic ADC

2018 IEEE International Symposium on Circuits and Systems (ISCAS) • 2018
View 1 Excerpt

A 10-b statistical ADC employing pipelining and sub-ranging in 32nm CMOS

2017 IEEE International Symposium on Circuits and Systems (ISCAS) • 2017
View 3 Excerpts

A hybrid ADC combining capacitive DAC-based multi-bit/cycle SAR ADC with flash ADC

2016 International Conference on Electronics, Information, and Communications (ICEIC) • 2016

8.1 nJ/b 2.4 GHz Short-Range Communication Receiver in 65 nm CMOS

IEEE Transactions on Circuits and Systems I: Regular Papers • 2015
View 1 Excerpt

66 Citations

05'06'09'12'15'18
Citations per Year
Semantic Scholar estimates that this publication has 66 citations based on the available data.

See our FAQ for additional information.

References

Publications referenced by this paper.
Showing 1-10 of 12 references

A 25-Ms/s 8-bit CMOS A/D converter

M. J. Pelgrom, A.C.J. v. Rens, M. Vertregt, M. B. Dijkstra
IEEE J. Solid-State Circuits , vol. 29, pp. 879–886, Aug. 1994. • 1994
View 4 Excerpts
Highly Influenced

A 6 b 1.3 GSample/s A/D converter in 0.35 /spl mu/m CMOS

2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177) • 2001
View 4 Excerpts
Highly Influenced

A 4 Gsample/s 8b ADC in 0.35 /spl mu/m CMOS

2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) • 2002
View 1 Excerpt

A CMOS 6 b 500 MSample/s ADC for a hard disk drive read channel

1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition (Cat. No.99CH36278) • 1999
View 3 Excerpts

A 700-Msample/s 6-b read channel A/D converter with 7-b servo mode

K. Nagaraj
inProc. IEEE Int. Solid State Circuits Conf. , Feb. 1998, pp. 150–151. • 1998
View 2 Excerpts

Impact of transistor mismatch on the speedaccuracy-power trade-off of analog CMOS circuits

P. Kinget, M. Steyaert
Proc. Custom Integrated Circuits Conf. , May 1996. • 1996
View 1 Excerpt

A 10-b 300-MHz interpolated-parallel A/D converter

H. Kimura, A. Matsuzawa, T. Nakamura, S. Sawada
IEEE J. Solid-State Circuits, vol. 28, pp. 438–446, April 1993. • 1993
View 2 Excerpts

A technique for reducing differential nonlinearity errors in flash A/D converters

K. Kattmann, J. Barrow
Proc. IEEE Int. Solid State Circuits Conf. , 1991, pp. 170–171. • 1991
View 2 Excerpts

Similar Papers

Loading similar papers…