Digital Background Calibration of Capacitor-Mismatch Errors in Pipelined ADCs

@article{TaherzadehSani2006DigitalBC,
  title={Digital Background Calibration of Capacitor-Mismatch Errors in Pipelined ADCs},
  author={Mohammad Taherzadeh-Sani and Anas A. Hamoui},
  journal={IEEE Transactions on Circuits and Systems II: Express Briefs},
  year={2006},
  volume={53},
  pages={966-970}
}
A digital background calibration technique is proposed to correct for the linearity error due to capacitor mismatches in pipelined analog-to-digital converters (ADCs). During the normal ADC operation, it randomly swaps the feedback capacitor with the sampling capacitor(s) in the multiplying digital-to-analog converter (MDAC) of each pipeline stage in the pipelined ADC. The capacitor-mismatch errors in all pipeline stages are then concurrently measured and corrected in the digital domain. The… CONTINUE READING
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