Device and circuit-level analog performance trade-offs: a comparative study of planar bulk FETs versus FinFETs

@article{Subramanian2005DeviceAC,
  title={Device and circuit-level analog performance trade-offs: a comparative study of planar bulk FETs versus FinFETs},
  author={V. Subramanian and B. Parvais and J. Borremans and A. Mercha and D. Linten and P. Wambacq and J. Loo and M. Dehan and N. Collaert and S. Kubicek and R. Lander and J. Hooker and F. Cubaynes and S. Donnay and M. Jurczak and G. Groeseneken and W. Sansen and S. Decoutere},
  journal={IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest.},
  year={2005},
  pages={898-901}
}
  • V. Subramanian, B. Parvais, +15 authors S. Decoutere
  • Published 2005
  • Engineering
  • IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest.
  • Comparison of digital and analog figures-of-merit of FinFETs and planar bulk MOSFETs reveals an interesting trade-off in analog/RF design space. It is seen that FinFETs possess key advantages over bulk FETs for applications around 5 GHz where the performance-power trade-off is important. In case of higher frequency applications bulk MOSFETs are shown to hold the advantage on account of their higher transconductance (Gm), provided a degraded voltage gain and a higher leakage current can be… CONTINUE READING
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