Developing a tethered Forth model

@article{Martin1991DevelopingAT,
  title={Developing a tethered Forth model},
  author={Harold M. Martin},
  journal={ACM Sigforth Newsletter},
  year={1991},
  volume={2},
  pages={17-19}
}
  • H. M. Martin
  • Published 1 February 1991
  • Computer Science
  • ACM Sigforth Newsletter
L WHAT EXACTLY IS A TETHERED FORTH MODEL? The term "tethered Forth model" can reasonably be used to describe a Forth model designed to run in conjunction with a source processor and one or more small target processors. More specifically, one could say that the source and target processors between them are running a Forth model. The source would typically be a general purpose processor such as an IBM PC or clone, with a full complement of hard disk and peripherals, while the target(s) would be a… 
1 Citations
Tethered Forth system for FPGA applications
TLDR
This paper presents the tethered Forth system dedicated for testing and debugging of FPGA based electronic systems, based on a small, 16-bit soft core CPU, used to implement the Forth Virtual Machine.