• Corpus ID: 30238313

Developing All-Skyrmion Spiking Neural Network

@article{He2017DevelopingAS,
  title={Developing All-Skyrmion Spiking Neural Network},
  author={Zhezhi He and Deliang Fan},
  journal={ArXiv},
  year={2017},
  volume={abs/1705.02995}
}
In this work, we have proposed a revolutionary neuromorphic computing methodology to implement All-Skyrmion Spiking Neural Network (AS-SNN). Such proposed methodology is based on our finding that skyrmion is a topological stable spin texture and its spatiotemporal motion along the magnetic nano-track intuitively interprets the pulse signal transmission between two interconnected neurons. In such design, spike train in SNN could be encoded as particle-like skyrmion train and further processed by… 

Figures from this paper

Skyrmion-Magnetic Tunnel Junction Synapse with Mixed Synaptic Plasticity for Neuromorphic Computing
a MTJ (Ta/CoFeB/MgO/CoFeB) device with both long- and short-term plasticity (LTP and STP) (mixed synaptic plasticity). We confirmed plasticity control by magnetic field, spin-orbit torque (SOT), and

References

SHOWING 1-10 OF 14 REFERENCES
Hybrid Spintronic-CMOS Spiking Neural Network With On-Chip Learning: Devices, Circuits and Systems
TLDR
This work proposes a spintronic synapse with decoupled spike transmission and programming current paths that can be utilized for pattern recognition problems and performs a simulation study based on an experimentally benchmarked device-simulation framework to demonstrate the interfacing.
Magnetic Tunnel Junction Based Long-Term Short-Term Stochastic Synapse for a Spiking Neural Network with On-Chip STDP Learning
TLDR
This work proposes a heterostructure composed of a Magnetic Tunnel Junction and a heavy metal as a stochastic binary synapse comprising two unique binary synaptic elements, in order to improve the synaptic learning efficiency.
A digital neurosynaptic core using embedded crossbar memory with 45pJ per spike in 45nm
TLDR
This work fabricated a key building block of a modular neuromorphic architecture, a neurosynaptic core, with 256 digital integrate-and-fire neurons and a 1024×256 bit SRAM crossbar memory for synapses using IBM's 45nm SOI process, leading to ultra-low active power consumption.
Unsupervised learning of digit recognition using spike-timing-dependent plasticity
TLDR
A SNN for digit recognition which is based on mechanisms with increased biological plausibility, i.e., conductance-based instead of current-based synapses, spike-timing-dependent plasticity with time-dependent weight change, lateral inhibition, and an adaptive spiking threshold is presented.
Current-Induced Dynamics of Multiple Skyrmions With Domain-Wall Pair and Skyrmion-Based Majority Gate Design
TLDR
The numerical micromagnetic simulation results indicate that the domain-wall pair could be pinned or depinned by a rectangular notch pinning site depending on both the number of skyrmions in the racetrack and the magnitude of driving current density.
Magnetic skyrmion logic gates: conversion, duplication and merging of skyrmions
TLDR
It is shown that the conversion, duplication and merging of isolated skyrmions with different chirality and topology are possible all in one system, providing important guidelines for utilizing the topology of nanoscale spin textures as information carriers in novel magnetic sensors and spin logic devices.
Blowing magnetic skyrmion bubbles
TLDR
A phase diagram for skyrmion formation is determined and the efficient manipulation of these dynamically created skyrMions, including depinning and motion, are revealed, which could lead to progress in sk Kyrmion-based spintronics.
The Brian Simulator
TLDR
“Brian” is a simulator for spiking neural networks that uses vector-based computation to allow for efficient simulations, and is particularly useful for neuroscientific modelling at the systems level, and for teaching computational neuroscience.
A reversible conversion between a skyrmion and a domain-wall pair in a junction geometry.
TLDR
It is shown a conversion is possible between a skyrmion and a domain-wall pair by connecting wide and narrow nanowires, enabling the information transmission between aSkyrmions device and adomain-wall device.
mLogic: Ultra-low voltage non-volatile logic circuits using STT-MTJ devices
TLDR
The design of logic circuits based exclusively on novel magnetoelectronic devices results in fully pipelined nonvolatile logic that can achieve ultra-low energy-per-operation.
...
...