Detailed routing violation prediction during placement using machine learning

@article{Tabrizi2017DetailedRV,
  title={Detailed routing violation prediction during placement using machine learning},
  author={Aysa Fakheri Tabrizi and Nima Karimpour Darav and Logan Rakai and Andrew A. Kennings and Laleh Behjat},
  journal={2017 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)},
  year={2017},
  pages={1-4}
}
The complexity of design rules at 22nm and below precludes direct incorporation of detailed routing (DR) rules into a placement algorithm. However, ignoring routability rules during the placement process may result in infeasible designs. The congestion estimated by a global router is conventionally used for routing estimation during placement, but it does not include real detailed routing violations, which adversely affect the routability of a design. Presently, there are no methods that… CONTINUE READING

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