Designing single-cycle long links in hierarchical NoCs

@article{Manevich2014DesigningSL,
  title={Designing single-cycle long links in hierarchical NoCs},
  author={Ran Manevich and Leon Polishuk and Israel Cidon and Avinoam Kolodny},
  journal={Microprocessors and Microsystems - Embedded Hardware Design},
  year={2014},
  volume={38},
  pages={814-825}
}
Hierarchical topologies are frequently proposed for large Networks-on-Chip (NoCs). Hierarchical architectures utilize, at the upper levels, long links of the order of the die size. RC delays of long links might reach dozens of clock cycles in advanced technology nodes, if delay reduction techniques (e.g. wire sizing and repeater insertion) are not applied. Some proposals assume that long links can be adjusted to satisfy timing requirements, but lack a deep evaluation of the tradeoffs and costs… CONTINUE READING