Designing logic circuits for probabilistic computation in the presence of noise

@article{Nepal2005DesigningLC,
  title={Designing logic circuits for probabilistic computation in the presence of noise},
  author={Kundan Nepal and R. Iris Bahar and Joseph L. Mundy and William R. Patterson and Alexander Zaslavsky},
  journal={Proceedings. 42nd Design Automation Conference, 2005.},
  year={2005},
  pages={485-490}
}
As Si CMOS devices are scaled down into the nanoscale regime, current computer architecture approaches are reaching their practical limits. Future nano-architectures will confront devices and interconnections with a large number of inherent defects, which motivates the search for new architectural paradigms. In this paper, we examine probabilistic-based design methodologies for nanoscale computer architectures based onMarkov random fields (MRF). The MRF approach can express arbitrary logic… CONTINUE READING

Citations

Publications citing this paper.
SHOWING 1-10 OF 63 CITATIONS, ESTIMATED 40% COVERAGE

158 Citations

01020'08'11'14'17
Citations per Year
Semantic Scholar estimates that this publication has 158 citations based on the available data.

See our FAQ for additional information.

References

Publications referenced by this paper.

Similar Papers

Loading similar papers…