Designing Scalable Systems with Two-level K-ary N-cube Wormhole-routed Interconnections

Abstract

Recent advancements in VLSI and packaging technologies are making it cost eeec-tive to integrate multiple processing units into a chip or a board. This demonstrates attractiveness in building scalable parallel systems using clustered conngurations while exploiting communication locality. Variety of clustered architectures, proposed in the past, using buses… (More)

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