DesignCon 2004 Package and Test Environment Design for a 10 Gigabit Ethernet Transceiver

@inproceedings{Liaw2004DesignCon2P,
  title={DesignCon 2004 Package and Test Environment Design for a 10 Gigabit Ethernet Transceiver},
  author={Haw-Jyh Liaw},
  year={2004}
}
This paper discusses the design and verification of the off-chip interconnects for a 10 Gigabit Ethernet to XAUI transceiver in a plastic BGA package. The design details of a high-performance, low cost, wirebond plastic BGA package suitable for 10Gb/s operation are first discussed. The paper then presents details of the board design, especially impedance… CONTINUE READING