Design specific variation in pattern transfer by via/contact etch process: full-chip analysis

@inproceedings{Sukharev2009DesignSV,
  title={Design specific variation in pattern transfer by via/contact etch process: full-chip analysis},
  author={Valeriy Sukharev and Ara Markosian and Armen Kteyan and Levon Manukyan and Nikolay Khachatryan and Jun-Ho Choy and Hasmik Lazaryan and Henrik Hovsepyan and Seiji Onoue and Takuo Kikuchi and Tetsuya Kamigaki},
  booktitle={Advanced Lithography},
  year={2009}
}
A novel model-based algorithm provides a capability to control full-chip design specific variation in pattern transfer caused by via/contact etch processes. This physics based algorithm is capable of detecting and reporting etch hotspots based on the fab defined thresholds of acceptable variations in critical dimension (CD) of etched shapes. It can be used also as a tool for etch process optimization to capture the impact of a variety of patterns presented in a particular design. A realistic… 
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References

SHOWING 1-10 OF 16 REFERENCES
Microscopic uniformity in plasma etching
As we enter the era of ultra‐large‐scale integrated circuit manufacture, plasma etching grows more important for fabricating structures with unprecedented dimensions. For feature sizes below 1 μm and
Profile modeling of high density plasma oxide etching
The mechanisms of the oxide etching process are studied using the overhang test structures etched on the Applied Materials inductively coupled plasma oxide etcher. The results from the overhang test
Simulation study of micro-loading phenomena in silicon dioxide hole etching
A new surface reaction model for a dry-etching topography simulator is propose. First, two types of radical adsorptions are introduced. One is a nondepositive type (Langmuir type) radical adsorption
Modeling and Optimization of the Step Coverage of Tungsten LPCVD in Trenches and Contact Holes
A model is presented to calculate the step coverage of blanket tungsten low pressure chemical vapor deposition(W-LPCVD) from tungsten hexafluoride (WF6). The model can calculate tungsten growth in
Control of surface reactions in high-performance SiO2 etching
The relation between SiO2 etch rates and incident fluxes of reactive species in a dual-frequency (27 MHz and 800 kHz) parallel-plate system was evaluated by using various in situ measurements tools.
Quantitative control of etching reactions on various SiOCH materials
We have developed a model to predict the process-window length in SiOCH etching using fluorocarbon plasmas (C4F8∕Ar∕O2 and C4F8∕Ar∕N2). The amount of incident reactive particles such as CF2, O, and N
Reaction kinetics and reactor modeling of the plasma etching of silicon
A model including the effects of diffusion and convection can be used to predict the etch rate of crystalline silicon in a plasma discharge of nitrogen trifluoride. The case of a radial flow reactor
Relationship of etch reaction and reactive species flux in C4F8/Ar/O2 plasma for SiO2 selective etching over Si and Si3N4
The relationship between reactive species flux and their modified surfaces was studied in a SiO2 highly selective etching over Si and Si3N4. Sample specimens with large patterns and φ 0.35 μm contact
Mesoscopic scale modeling of microloading during low pressure chemical vapor deposition
A model designed to deal with pattern dependences of deposition processes is discussed. It is a mesoscopic scale model in the sense that it deals with spatial scales on the order of 10 -3 to 10 -2 m,
Multiscale modeling of chemical vapor deposition
An integrated method for modeling chemical vapor deposition on length scales ranging from microns to meters has been developed. The macroscale problem of flow and transport in a single wafer, low
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