Design of a reversible single precision floating point multiplier based on operand decomposition

@article{Nachtigal2010DesignOA,
  title={Design of a reversible single precision floating point multiplier based on operand decomposition},
  author={M. Nachtigal and H. Thapliyal and N. Ranganathan},
  journal={10th IEEE International Conference on Nanotechnology},
  year={2010},
  pages={233-237}
}
Reversible logic is a promising field of research that finds applications in low power computing, quantum computing, optical computing, and other emerging computing technologies. Further, floating point multiplication is one of the major operations in image and digital signal processing applications. The single precision floating-point multiplier requires the design of efficient 24×24 bit integer multiplier. In this work, we propose a new reversible design of single precision floating point… Expand
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References

SHOWING 1-10 OF 14 REFERENCES
Optimized Reversible Multiplier Circuit
Novel Reversible `TSG' Gate and Its Application for Designing Components of Primitive Reversible/Quantum ALU
  • H. Thapliyal, M. Srinivas
  • Computer Science, Mathematics
  • 2005 5th International Conference on Information Communications & Signal Processing
  • 2005
Improving Accuracy in Mitchell's Logarithmic Multiplication Using Operand Decomposition
Reconfigurable Low Power FIR Filter based on Partitioned Multipliers
Optimal synthesis of multiple output Boolean functions using a set of quantum gates by symbolic reachability analysis
A low-power Booth multiplier using novel data partition method
Reversible Logic-Based Concurrently Testable Latches for Molecular QCA
Logical reversibility of computation
...
1
2
...