Design of a reversible binary coded decimal adder by using reversible 4-bit parallel adder

Abstract

In this paper, we have proposed a design technique for the reversible circuit of binary coded decimal (BCD) adder. The proposed circuit has the ability to add two 4-bits binary variables and it transforms the addition into the appropriate BCD number with efficient error correcting modules where the operations are reversible. We also show that the proposed… (More)
DOI: 10.1109/ICVD.2005.74

Topics

1 Figure or Table

Cite this paper

@article{Babu2005DesignOA, title={Design of a reversible binary coded decimal adder by using reversible 4-bit parallel adder}, author={Hafiz Md. Hasan Babu and Ahsan Raja Chowdhury}, journal={18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design}, year={2005}, pages={255-260} }