Design of a fully-pipelined systolic array for flexible transposition-free VLSI of 2-D DFT

@article{Meher2005DesignOA,
  title={Design of a fully-pipelined systolic array for flexible transposition-free VLSI of 2-D DFT},
  author={Pramod Kumar Meher},
  journal={IEEE Transactions on Circuits and Systems II: Express Briefs},
  year={2005},
  volume={52},
  pages={85-89}
}
A novel approach to design an efficient systolic structure to implement the two-dimensional discrete Fourier transform (DFT) is presented. The proposed systolic structure consists of (N/spl times/N) simple locally connected processing elements that perform two complex multiplications and two additions during a cycle period. It does not involve any transposition operation and, therefore, the corresponding hardware and time is saved by the structure. It offers full pipelining, and computes a two… CONTINUE READING
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