Design of a capacitive DAC mismatch calibrator for split SAR ADC in 65 nm CMOS

Abstract

This paper presents the design and implementation of a capacitive digital to analog converter (CDAC) mismatch calibrator used in split successive approximation resistor (SAR) analog to digital converter (ADC) in a 65 nm complementary metal oxide semiconductor (CMOS) process. The calibrator adopts a compensation capacitor connected to the least significant… (More)

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