Design of a Timing Signal Generator (TSG) for RADAR Using FPGA

@article{Kholapure2009DesignOA,
  title={Design of a Timing Signal Generator (TSG) for RADAR Using FPGA},
  author={Anudeepa S. Kholapure and A. Agarwal and K. Aurobindo and S. Nema},
  journal={2009 Second International Conference on Emerging Trends in Engineering \& Technology},
  year={2009},
  pages={406-409}
}
The paper discusses the application of VLSI technology to implement the functions of TSG of a radar system using VHDL with behavioral model, as the HDL and targeting it to a FPGA. The TSG is the heart of radar application to generate timing and control signals to operate radar in different phases like detection, tracking and acquisition, and hold mode. The advantage of TSG design with FPGA is that TSG unit assembly gets mounted into a single chip, parallel processing is done and changes at the… Expand
2 Citations
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References

SHOWING 1-5 OF 5 REFERENCES
The Designer's Guide to VHDL
TLDR
The Designer's Guide to VHDL is both a comprehensive manual for the language and an authoritative reference on its use in hardware design at all levels, from the system level to the gate level. Expand
Designing reusable components in VHDL
  • J. Chang, S. K. Agun
  • Computer Science, Materials Science
  • Proceedings of 13th Annual IEEE International ASIC/SOC Conference (Cat. No.00TH8541)
  • 2000
TLDR
The reusability issues and the design methodologies to achieve Design-For-Reusability (DFR) are summarized and the results of measuring the reUSability of ten VHDL applications, based on the reusable models, are presented. Expand
The designers guide to VHDL
  • San Francisco: Morgan Cuffman, 2edition,
  • 2005
Designing reusable components in VHDL , ASIC / SOC Conference , 2000
  • Skolnik , “ Introduction to RADAR system
  • 2001
Skolnik, “Introduction to RADAR system, Tata Mc Graw –Hill ,third edition, New Delhi,2001
  • 2001