Design of a Subthreshold-Supply Bootstrapped CMOS Inverter Based on an Active Leakage-Current Reduction Technique

@article{Ho2012DesignOA,
  title={Design of a Subthreshold-Supply Bootstrapped CMOS Inverter Based on an Active Leakage-Current Reduction Technique},
  author={Yingchieh Ho and Chiachi Chang and Chauchin Su},
  journal={IEEE Transactions on Circuits and Systems II: Express Briefs},
  year={2012},
  volume={59},
  pages={55-59}
}
This brief presents a bootstrapped CMOS inverter operated with a subthreshold power supply. In addition to improving the driving ability, a large gate voltage swing from -VDD to 2VDD suppresses the subthreshold leakage current. As compared with other reported works, the proposed bootstrapped inverter uses fewer transistors operated in the subthreshold region. Therefore, our design has shorter delay time. The Monte Carlo analysis results indicate that a sigma of delay time is only 6.3 ns under… CONTINUE READING
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