Design of a Nanometric Reversible 4-Bit Binary Counter with Parallel Load

@inproceedings{Haghparast2011DesignOA,
  title={Design of a Nanometric Reversible 4-Bit Binary Counter with Parallel Load},
  author={Majid Haghparast and Mohammad Samadi Gharajeh},
  year={2011}
}
In recent years, reversible logic has considered as an efficient computing method having its applications in quantum computing, low power computing, nanotechnology and DNA computing. All of the Boolean functions can be implemented using reversible gates. In this paper, we propose a reversible 4-Bit binary counter with parallel load. It has minimum complexity and quantum cost considerably. The proposed circuit is the first attempt of designing a 4-Bit binary counter with parallel load. Counter… CONTINUE READING

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