Design of a 6GHz high-gain low noise amplifier

  title={Design of a 6GHz high-gain low noise amplifier},
  author={Xusheng Tang and Fengyi Huang and Dawei Zhao},
  journal={2012 International Conference on Microwave and Millimeter Wave Technology (ICMMT)},
This paper presents the design of a low noise amplifier in 0.13-μm CMOS technology. The conventional inductive degeneration is applied to reduce the noise figure. The amplifying stage uses the cascode structure to increase the gain and achieve a better isolation. Operated at 1.2V, the simulated gain of the LNA is better than 20 dB while the noise figure is less than 1.8 dB with the bandwidth from 5 GHz to 6 GHz. The core size of the fully-integrated CMOS LNA circuit is 680μm*800μm. 

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1.5V 5 GHz low noise amplifier with source degeneration

2006 Asia-Pacific Microwave Conference • 2006
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A 5GHz resistive-feedback CMOS LNA for low-cost multi-standard applications

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