Design of Ultra-Low Power Combinational Standard Library Cells Using A Novel Leakage Reduction Methodology

@article{Lakshmikanthan2006DesignOU,
  title={Design of Ultra-Low Power Combinational Standard Library Cells Using A Novel Leakage Reduction Methodology},
  author={Preetham Lakshmikanthan and Karan Sahni and Adrian Nunez},
  journal={2006 IEEE International SOC Conference},
  year={2006},
  pages={93-94}
}
Leakage power loss is a major concern as it drains the battery even when a circuit is completely idle. Efficient leakage control mechanisms are necessary to maximize battery life. In this paper, the design and characterization of an ultra-low power combinational CMOS standard cell library is presented. A novel technique that achieves cancellation of leakage effects in both the pull-up network (PUN) as well as the pull-down network (PDN) of CMOS cells is presented. A combination of high-VT and… CONTINUE READING
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